PRELIMINARY AGENDA – all times are tentative
1st day – 21 January 2025
08:45 | Join in |
09:00 | Welcome |
09:10 | Hunter's hardware architecture and its programming models Dr. Christian Simmendinger (HPE), Igor Pasichnyk (AMD), and Johanna Potyka (AMD) |
10:00 | Break |
10:15 | Introduction to Hybrid Programming in HPC – MPI+X |
10:45 | Programming Models |
10:50 | – MPI + OpenMP |
11:45 | Practical (how to compile and start) |
12:30 | Lunch |
14:00 | – continue: MPI + OpenMP |
14:45 | Break |
15:00 | – continue: MPI + OpenMP |
15:45 | Practical (how to do pinning) |
16:15 | Q & A |
16:30 | End of first day |
2nd day – 22 January 2025
08:45 | Join in |
09:00 | – continue: MPI + OpenMP |
09:00 | – Case study: Simple 2D stencil smoother |
09:30 | Practical (hybrid through OpenMP parallelization) |
10:45 | Break |
11:00 | – Overlapping Communication and Computation |
11:30 | Practical (taskloops) |
12:15 | – MPI + OpenMP Conclusions |
12:30 | Lunch |
14:00 | – MPI + Accelerators |
15:00 | Break |
15:15 | – MPI + Accelerators (continued) |
16:15 | Q & A |
16:30 | End of second day |
3rd day – 23 January 2025
08:45 | Join in |
09:00 | Programming Models (continued) |
09:05 | – MPI + MPI-3.0 Shared Memory |
10:00 | Break |
10:15 | – MPI Memory Models and Synchronization |
11:00 | Break |
11:15 | – Pure MPI |
11:35 | – Recap - MPI Virtual Topologies |
12:05 | – Topology Optimization |
12:45 | Conclusions |
13:00 | Lunch |
14:30 | Practical (replicated data) |
15:45 | Q & A, Feedback |
16:30 | End of third day (course) |